To continue to improve electronics, including memory devices, new types of channel materials corresponding to channel regions of metal oxide semiconductor field effect transistors (MOSFETs), along with corresponding architectures, continue to be researched. One group of channel materials, which are referred to as III-V materials, or III-V compounds, are already used in communication products and optoelectronic products, and are now receiving widespread attention in the course of channel material research.
III-V materials are chemical compounds with at least one group III element and at least one group V element. III-V materials generally have much higher electron mobility and conductivity than silicon materials, making III-V materials potentially useful for future high-speed, low-power applications, and also making III-V materials candidates for advances in complementary metal-oxide-semiconductor (CMOS) technology.
Among III-V materials, InAs (Indium-Arsenide) has very high electron mobility, but also has a relatively low bandgap, thereby limiting their use in general CMOS applications due to a corresponding high leakage current resulting from the low bandgap. InGaAs (Indium-Gallium-Arsenide) materials, on the other hand, provide a more promising potential for future low-power, high-mobility field effect transistors due to having relatively high electron mobility while also having a higher bandgap than InAs materials. InGaAs materials, therefore, exhibit a much lower degree of leakage current when compared to InAs materials.
Despite high electron mobility, III-V materials such as InGaAs (and InAs) typically suffer from a high density of interface defects (Dit due to a lack of corresponding amorphous beneficial native oxides. Passivation of an interface between the III-V materials and a high-k (HK) dielectric layer deposited thereon may be used to realize the full potential of III-V materials. Extensive passivation schemes have been applied to passivate the III-V/HK interface, such schemes including chalcogenide (S, Se) passivation, various novel +3 valence dielectrics, such as TMA-1st Al2O3, La2O3, nitridation, etc. The key strategy for these passivation approaches is to remove as much of the naturally formed native amorphous oxides as possible before the subsequent HK deposition.
Another passivation approach to III-V materials may include passivating an InAs surface, and instead of removing the naturally formed native amorphous oxides, the approach intentionally forms the native oxides to yield a unique crystalline structure by subjecting the InAs surface to a specific controlled oxidizing environment, e.g., a molecular oxygen beam at around 3E-6 mbar, at a temperature of about 290° C. to about 330° C. The Dit values obtained through this approach were shown to reach a low 3E11/cm2-eV of Dit. Accordingly, InAs-nFETs fabricated using this method could exhibit high mobility with the low Dit.